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Magma Announces Talus Design 1.1 and Talus RTL 1.1

December 4, 2009 (FinancialWire) — Magma(R) Design Automation Inc. (NASDAQ: LAVA), a provider of chip design software, announced the availability of Talus(R) Design 1.1 and Talus RTL 1.1, Magma’s full-chip synthesis products for advanced integrated circuits.

Capabilities in these new versions include GlassBox abstraction technology; enhanced optimization algorithms; RTL-to-GDSII reference flows for leading IP providers including ARM, MIPS and Imagination Technologies; and additional interfaces for commonly used third-party design-for-test and formal verification tools. These enhanced synthesis products with new out-of-the box synthesis flows eliminate the need to develop customized scripts, significantly reducing the time and effort required to achieve timing, area and power goals.

Talus Design 1.1 and Talus RTL 1.1: Fast, High-Capacity Synthesis

Talus RTL and Talus Design are full-featured RTL logic synthesis solutions that optimize for power, area and timing, and generate both gate-level netlists or Magma Volcano databases for handoff. Talus RTL provides a complete RTL-to-netlist synthesis solution while Talus Design adds physical synthesis capabilities to deliver higher levels of predictability and performance. Unlike traditional synthesis tools, a single Talus Design or Talus RTL license provides a fast, high-capacity synthesis solution with seamless scan insertion and scan optimization that supports VHDL, Verilog and System Verilog. The Magma synthesis tools are the first to support both the Common Power Format and Unified Power Format for specifying low-power design intent.

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